{"title":"Sensitivity-based multiple-Vt cell swapping for leakage power reduction","authors":"W. Lee, Hung-Yi Liu, Kuan-Hsien Ho, Yao-Wen Chang","doi":"10.1109/VDAT.2008.4542439","DOIUrl":null,"url":null,"abstract":"With the technology advancement, leakage power has become a significant source of total power consumption, and thus it is desirable to develop effective leakage-power reduction techniques for power optimization. The sensitivity-based technique has been shown to be an efficient approach to leakage power reduction by swapping gates (cells) with different threshold voltages. Nevertheless, its solution quality is limited and unstable because the technique does not have a global view on the effects of the gate swapping on other gates. To remedy this weakness, we develop a novel sensitivity formulation with a more global view on the gate-swapping effects. We also develop two static-timing-analysis engines embedded in the proposed algorithm to improve the efficiency. Experimental results show that our algorithm can effectively reduce leakage power by up to 74.4%. Compared with the state-of-the-art sensitivity-based method, we can achieve more leakage-power reduction by up to 20.6% and consume less running time and memory. The results show the effectiveness and efficiency of our algorithm.","PeriodicalId":156790,"journal":{"name":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2008.4542439","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
With the technology advancement, leakage power has become a significant source of total power consumption, and thus it is desirable to develop effective leakage-power reduction techniques for power optimization. The sensitivity-based technique has been shown to be an efficient approach to leakage power reduction by swapping gates (cells) with different threshold voltages. Nevertheless, its solution quality is limited and unstable because the technique does not have a global view on the effects of the gate swapping on other gates. To remedy this weakness, we develop a novel sensitivity formulation with a more global view on the gate-swapping effects. We also develop two static-timing-analysis engines embedded in the proposed algorithm to improve the efficiency. Experimental results show that our algorithm can effectively reduce leakage power by up to 74.4%. Compared with the state-of-the-art sensitivity-based method, we can achieve more leakage-power reduction by up to 20.6% and consume less running time and memory. The results show the effectiveness and efficiency of our algorithm.