Low cost ATE pin electronics for multigigabit-per-second at-speed test

Abstract

This paper describes the design and performance of low-cost electronics modules which can be used for testing multigigabit-per-second digital components and subsystems within an automated test environment. Pattern stimuli are generated at rates up to 2.67 Gbps with timing errors less than 50 ps. Pattern sensitivity is less than 40 ps and RMS jitter is typically about 8 ps. A high-speed differential buffer provides emitter-coupled logic (ECL) transitions in about 200 ps. A data-capture circuit is shown to sample repetitive waveforms with 2.67 Gbps data rates. It is estimated that the component cost per channel for a large ATE would be under $1000. Cost savings is achieved by eliminating unnecessary features, emphasizing simple yet precise design techniques, and use of commercially-available (low-cost) components.