{"title":"Evaluation of self-heating in SOI CMOS ULSI","authors":"D. Dallmann, K. Shenai","doi":"10.1109/IRWS.1994.515832","DOIUrl":null,"url":null,"abstract":"SOI technology potentially offers numerous benefits over bulk silicon at deep submicron dimensions. However, the presence of a buried SiO/sub 2/ layer causes self-heating to occur which can impair device performance. The effects of self-heating on SOI MOSFET performance are examined as device dimensions are scaled from 1.0 /spl mu/m to 0.25 /spl mu/m. Results show severe self-heating under static conditions which has implications for IC reliability issues.","PeriodicalId":164872,"journal":{"name":"Proceedings of 1994 IEEE International Integrated Reliability Workshop (IRWS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1994 IEEE International Integrated Reliability Workshop (IRWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRWS.1994.515832","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
SOI technology potentially offers numerous benefits over bulk silicon at deep submicron dimensions. However, the presence of a buried SiO/sub 2/ layer causes self-heating to occur which can impair device performance. The effects of self-heating on SOI MOSFET performance are examined as device dimensions are scaled from 1.0 /spl mu/m to 0.25 /spl mu/m. Results show severe self-heating under static conditions which has implications for IC reliability issues.