{"title":"Design for thermo-mechanical reliability of a 3D microelectronic component using 3D FEM","authors":"S. Belhenini, A. Tougui, F. Dosseul","doi":"10.1109/EUROSIME.2014.6813881","DOIUrl":null,"url":null,"abstract":"3D microelectronic components are exposed to electrical, thermal, mechanical and chemical stresses generated by storage, transport, manipulation, functioning and environment. The reliability of the components depends partially on the reliability of interconnections which insures the mechanical and the electrical junctions between components and printed circuits. Reliability has to be evaluated on mechanical demonstrators before the production stage. It is currently studied by employing standardized tests. Modeling has been proven to be a very efficient tool in IC Packaging reliability, especially for designing and optimization, compared with experimental standardized tests, which are expensive and time-consuming. In this work, the board level thermomechanical reliability of a 3D chip to wafer component was evaluated by using a coupled thermal-structural numerical analysis. 3D FEM results were employing in the design optimization of 3D components. The critical solder bump strain energy density is used as the principal reliability criteria. The influence of the internal architectures of 3D components and the TSVs locations on the thermomechanical reliability has been studied.","PeriodicalId":359430,"journal":{"name":"2014 15th International Conference on Thermal, Mechanical and Mulit-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 15th International Conference on Thermal, Mechanical and Mulit-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUROSIME.2014.6813881","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
3D microelectronic components are exposed to electrical, thermal, mechanical and chemical stresses generated by storage, transport, manipulation, functioning and environment. The reliability of the components depends partially on the reliability of interconnections which insures the mechanical and the electrical junctions between components and printed circuits. Reliability has to be evaluated on mechanical demonstrators before the production stage. It is currently studied by employing standardized tests. Modeling has been proven to be a very efficient tool in IC Packaging reliability, especially for designing and optimization, compared with experimental standardized tests, which are expensive and time-consuming. In this work, the board level thermomechanical reliability of a 3D chip to wafer component was evaluated by using a coupled thermal-structural numerical analysis. 3D FEM results were employing in the design optimization of 3D components. The critical solder bump strain energy density is used as the principal reliability criteria. The influence of the internal architectures of 3D components and the TSVs locations on the thermomechanical reliability has been studied.