A 12-Channel 10 Gbps/ch VCSEL Driver ASIC in 55 nm CMOS for High-Energy Physics Experiments-辐射效应国际会议

Abstract

VCSEL-based array optical data transmission system has been prevailingly developed for the front-end readout systems and is foreseen to become the important infrastructure of the high energy physics experiments in the future. This paper presents the design and test results of a 12 × 10 Gbps/ch VCSEL driver ASIC fabricated in a standard 55nm CMOS technology. In the single channel core of the chip, a 4-step input equalizer stage was used to compensate the high frequency loss and optimize the eye quality. The pre-driver (limiting amplifier) stage uses the shared inductor technique to obtain sufficient bandwidth (16.5 dB, 8.3 GHz) in a limited area, and the output driver stage employs both the programmable R-C degradation structure and the feed-forward capacitor technology to further improve the bandwidth. The whole chip features a size of 1.45 x 4.00 mm2 with a total power consumption of 426 mW when 12 channels are all enabled. The test results show uniform and wide-open 10-Gbps eyes when multiple channels are working simultaneously. The chip has also been tested in the X-ray radiation environment with a total dose up to 500 krad, and no malfunction and performance degradation was found in the test.