Impact of Via-Inductance on Stability Behavior of Large Gate-Periphery Multi-finger RF Transistors

S. A. Ahsan, A. Pampori, Sudip Ghosh, S. Khandelwal, Y. Chauhan
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Abstract

In this paper, the impact of source via-inductance on stability performance of large gate-periphery RF transistors is investigated in terms of Rollett’s stability factor (K-factor) using a small-signal equivalent circuit model. The RF device-under-test studied in this work is a commercial multi-finger GaN HEMT with a considerably large gate-periphery of 10 × 90 µm. A systematic analysis of the K-factor is done by deriving its mathematical expression in terms of the equivalent circuit intrinsic and extrinsic components. While gate-to-drain capacitance is unanimously considered to be the most critical component in determining the device stability performance, due to the formation of the feedback loop, the simulation and experimental results obtained in this work reveal potential regions of device instability in the form of peaks and valleys, that emerge as a manifestation of the coupling between the via-inductance and the intrinsic drain-to-source capacitance. This study is of significance particularly to multi-finger large gate-periphery devices since they have a reduced gate-resistance and therefore are driven further into instability. This work is expected to serve as a guideline in obtaining optimized multi-finger RF transistors with regard to stability.
过通电感对大栅极外围多指射频晶体管稳定性的影响
本文采用小信号等效电路模型,从罗利特稳定因子(k因子)的角度研究了源过感对大型栅极外围射频晶体管稳定性能的影响。在这项工作中研究的射频器件是一个商用多指GaN HEMT,具有相当大的10 × 90 μ m的栅极外围。通过推导等效电路固有和外在分量的数学表达式,对k因子进行了系统的分析。虽然闸极漏极电容被一致认为是决定器件稳定性性能的最关键因素,但由于反馈回路的形成,本工作获得的仿真和实验结果揭示了器件不稳定的潜在区域,其形式为峰谷,这是通过电感和本具漏极源电容之间耦合的表现。这项研究对多指大型栅极外围器件尤其重要,因为它们具有降低的栅极电阻,因此进一步进入不稳定状态。这项工作有望为获得优化的多指射频晶体管的稳定性提供指导。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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