The 3D RESURF junction

F. Udrea, A. Popescu, W. Milne
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引用次数: 14

Abstract

This paper reports a new device concept-the 3D RESURF junction, which is applicable to a large class of power devices which we term 3D power devices. The new class of devices features considerably superior breakdown performance compared to any lateral power devices reported to date and challenges the state-of-the art vertical devices such as the VDMOSFET. The 3D Double Gate devices also benefit by having a low on-resistance due to carrier modulation in the drift region. The 3D RESURF is demonstrated numerically through extensive, advanced 2-D and 3-D simulations.
3D RESURF连接点
本文提出了一种新的器件概念——三维复用结,它适用于一大类功率器件,我们称之为三维功率器件。与迄今为止报道的任何横向功率器件相比,新型器件具有相当优越的击穿性能,并挑战了最先进的垂直器件,如VDMOSFET。3D双栅器件还受益于由于在漂移区域中的载波调制而具有低导通电阻。通过广泛、先进的2d和3D模拟,对3D RESURF进行了数值验证。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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