Simulation and experimental study on chip module warpage by digital image correlation

Abstract

In this paper, warpage experiment was carried out on electronic module in heating process by the digital image correlation. As a widespread used measurement in recent years, digital image correlation technology was used in the electronic packaging for measuring warpage and its strain. DIC includes two key steps: camera calibration and image matching. The camera calibration involves a pinhole model approach. It employs feature-matching-based initial guess, multiple subsets, iterative optimization algorithm, and reliability-guided computation path to achieve fast and accurate image matching. Image matching process was calculated by software Vic-3D. Simulation have been conducted to verify the experimental results by Abaqus. By comparing the results of experiment and simulation, the measurement results for chip's warpage are correct.