Reliability evaluation for integrated circuit with defective interconnect under electromigration

Abstract

In electromigration degradation process the existing physical defects on interconnect play a critical role by significantly accelerating the EM damage under increased current density and elevated temperature. In this work the simulation models were upgraded in the IC reliability simulator ARET to incorporate the effect of interconnect physical defects in expected lifetime prediction. Then based on the statistical approach, a probability model was developed to evaluate the system-level circuit reliability with defective interconnect under EM degradation. The probability model has been successfully implemented in ARET tool to simulate and evaluate both interconnect and circuit level reliabilities.