Environmentally friendly, high thermal resistant, low CTE substrate material for semiconductor packaging

Abstract

Semiconductor packaging technology has been moving towards increased miniaturization, lighter weight and higher density. Flip Chip packaging is therefore becoming the mainstream packaging technology for next generation devices. The technology trend has been moving towards much finer pitch interconnections between the semiconductor chip and the package substrate, much narrower circuit width on the substrate and a much smaller diameter of the circuitry layer interconnection. Thus, concerns arise regarding mechanical and electrical deterioration and failure at the interconnections. Previously much more focus had been placed on systems utilizing Halogen-free and Pb-free raw materials in order to meet environmental requirements. In this paper, we are reporting a new substrate material for semiconductor packages (Copper-clad-laminate: ELC-4785GS, Prepreg: EI-6785GS, Build-up material: APL-4601) which Sumitomo Bakelite has begun developing.