R. Cantoro, M. Huch, T. Kilian, R. Martone, Ulf Schlichtmann, Giovanni Squillero
{"title":"Machine Learning based Performance Prediction of Microcontrollers using Speed Monitors","authors":"R. Cantoro, M. Huch, T. Kilian, R. Martone, Ulf Schlichtmann, Giovanni Squillero","doi":"10.1109/ITC44778.2020.9325253","DOIUrl":null,"url":null,"abstract":"During the manufacturing process, electronic devices are thoroughly tested for defects. However, testing for well-known fault models, such as stuck-at and transition delay, may not be sufficient for an effective performance screening. In modern devices, Design-for-Testability features embedded at design time can allow the tester to apply stimuli and measure different critical parameters. We propose to use some of these structures, namely the speed monitors, to predict the maximum operating speed, and screen out under-performing devices. We design a complete methodology, from the extraction of robust labels, through a machine-learning algorithm, down to a post-processing step, able to meet the quality standards imposed by industry. Experimental results using real production data demonstrate the feasibility of the approach.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Test Conference (ITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITC44778.2020.9325253","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
During the manufacturing process, electronic devices are thoroughly tested for defects. However, testing for well-known fault models, such as stuck-at and transition delay, may not be sufficient for an effective performance screening. In modern devices, Design-for-Testability features embedded at design time can allow the tester to apply stimuli and measure different critical parameters. We propose to use some of these structures, namely the speed monitors, to predict the maximum operating speed, and screen out under-performing devices. We design a complete methodology, from the extraction of robust labels, through a machine-learning algorithm, down to a post-processing step, able to meet the quality standards imposed by industry. Experimental results using real production data demonstrate the feasibility of the approach.