Low capacitance approaches for 22nm generation Cu interconnect

T. Bao, H. Chen, C.J. Lee, H. Lu, S. Shue, C. Yu
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引用次数: 5

Abstract

Various integration approaches, including homogeneous porous Low-k and air gaps, for low-capacitance solution were investigated for 22nm Cu interconnect technology and beyond. For homogeneous Low-k approach, K=2.0 Low-k material is successfully integrated with Cu. Up to 15% line to line capacitance reduction compared with LK-1 (K= 2.5) was demonstrated by a damage-less etching and CMP process. For air gap approach, a cost-effective and Selective air gaps formation process was developed. Air gaps are selectively formed only at narrow spacing between conduction lines without additional processes.
22nm代铜互连的低电容方法
研究了22nm铜互连技术及以后的低电容解决方案的各种集成方法,包括均匀多孔Low-k和气隙。对于均匀Low-k方法,K=2.0 Low-k材料与Cu成功集成。与LK-1 (K= 2.5)相比,通过无损伤蚀刻和CMP工艺证明了高达15%的线对线电容降低。对于气隙方法,开发了一种具有成本效益和选择性的气隙形成工艺。气隙仅在导线之间的窄间距处选择性形成,无需额外的工艺。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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