ARC for sub-0.18 /spl mu/m logic and gigabit DRAM frontend and backend processes

1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216) Pub Date : 1998-06-09 DOI:10.1109/VLSIT.1998.689210

W.W. Lee, Qizhi He, A. Chatterjee, G. Xing, B. Brennan, A. Singh, E. Zielinski, M. Hanratty, Sunny Fang, D. Rogers, G. Dixit, D. Carter, J. D. Luttmer, B. Havermann, R. Chapman

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引用次数: 1

Abstract

We have developed different Si/sub x/O/sub y/N/sub z/ antireflective coating (ARC) films for many different substrates for deep-UV lithography and implemented then into sub-0.18 /spl mu/m logic and Gigabit DRAM frontend and backend processes. The Si/sub x/O/sub y/N/sub z/ film has dual functions: reducing substrate reflectivity to a minimum, and serving as a hardmask for poly and metal etch. These properties of Si/sub x/O/sub y/N/sub z/ are crucial to tight CD control and fabrication of unique device structures. Plasma damage from ARC deposition is negligible. Using the designed Si/sub x/O/sub y/N/sub z/ and linewidth reduction etch, sub-0.1 /spl mu/m metal gate nMOSFETs are demonstrated. Backend sub-0.25 /spl mu/m multilevel metal patterning and etch with Si/sub x/O/sub y/N/sub z/ produce excellent metal profiles and 100% comb yield. A designed ARC also produces superior 1 Gigabit DRAM 0.16 /spl mu/m storage node contact patterning.

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ARC用于低于0.18 /spl mu/m的逻辑和千兆DRAM前端和后端进程

我们已经为许多不同的基板开发了不同的Si/sub x/O/sub y/N/sub z/抗反射涂层(ARC)薄膜，用于深紫外光刻，并将其实现在低于0.18 /spl mu/m的逻辑和千兆DRAM前端和后端工艺中。Si/sub x/O/sub y/N/sub z/薄膜具有双重功能:将衬底反射率降低到最小，并作为poly和金属蚀刻的硬掩膜。Si/sub x/O/sub y/N/sub z/的这些性质对于严格的CD控制和制造独特的器件结构至关重要。电弧沉积造成的等离子体损伤可以忽略不计。利用所设计的Si/sub x/O/sub y/N/sub z/和线宽减小蚀刻，演示了sub-0.1 /spl mu/m的金属栅极nmosfet。后端sub-0.25 /spl mu/m多级金属图案和Si/sub x/O/sub y/N/sub z/蚀刻产生优异的金属轮廓和100%的梳收率。设计的ARC还可以产生优越的1千兆DRAM 0.16 /spl mu/m存储节点接触图案。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)

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