T. Ueda, E. Tamaoka, K. Yamashita, N. Aoi, S. Mayumi
{"title":"A novel air gap integration scheme for multi-level interconnects using self-aligned via plugs","authors":"T. Ueda, E. Tamaoka, K. Yamashita, N. Aoi, S. Mayumi","doi":"10.1109/VLSIT.1998.689193","DOIUrl":null,"url":null,"abstract":"A novel multi-level interconnect process, realizing air gap structures composed of not new low k materials but conventional SiO/sub 2/ films, has been developed in order to drastically decrease the capacitance between lines. The effective relative dielectric constant of 1.8 is obtained. This process can solve the significant issues associated with air gap structure, such as the via failures due to misalignment between the line and via levels.","PeriodicalId":402365,"journal":{"name":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1998.689193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
A novel multi-level interconnect process, realizing air gap structures composed of not new low k materials but conventional SiO/sub 2/ films, has been developed in order to drastically decrease the capacitance between lines. The effective relative dielectric constant of 1.8 is obtained. This process can solve the significant issues associated with air gap structure, such as the via failures due to misalignment between the line and via levels.