Generation and verification of boundary independent compact thermal models for active components according to the DELPHI/SEED methods

Abstract

In the European project SEED (Supplier Evaluation and Exploitation of DELPHI), methods for thermal characterization of active components developed in DELPHI were evaluated by component suppliers. The methods were improved for practical application and extended to all IC package types. Test parts were chosen to cover as wide as possible a range of different plastic packages currently in use, including comparison of Alloy 42 (FeNi42) and Cu-based leadframe material, as well as a large and a small chip inside the same package, standard and thermally enhanced power devices, DSO, QFP and BGA packages. For all device types investigated, it was possible to generate simple resistor networks which reproduce junction temperatures and fluxes of a detailed finite element model for all 38 boundary conditions suggested in DELPHI with an average accuracy of 1-2%. Maximum errors are in general about 10% or less. As result of the SEED project, methods for thermal characterization of active components are available, which not only work in practice, but are also robust and low cost, because no test PCB is needed for measurements. Physically, they are much better suited to model validations than existing thermal resistance measurements. The resulting thermal resistor network allows end users for the first time to routinely predict the junction temperatures of components in their specific applications with an acceptable accuracy. The final goal of a simple and universal thermal characterization of electronic components is achieved. Standardization and adoption is in progress.