Role of Oxide/Nitride Interface Traps on the Nanocrystal Memory Characteristics

Abstract

In this work we are addressing the threshold voltage instability observed in non volatile nanocrystal memories (NCMs) during the retention experiments under constant applied bias. Such instability derives from the charge motion at the oxide/nitride interface traps of the oxide/nitride/oxide stack employed as control dielectric. We also investigated the impact of temperature on the cell retention properties, showing important and original results that could be attributed to the structure of the control dielectric stack.