Resistive Bridging Faults DFT with Adaptive Power Management Awareness

Abstract

A key design constraint of circuits used in handheld devices is the power consumption, due mainly to the limitations of battery life. The employment of adaptive power management (APM) methods optimizes the power consumption of such circuits. This paper describes an effective APM-aware DFT technique that consists of a Test Generation Suite, including fault list generation, test pattern generation and fault simulation. The test generation suite is capable of generating test patterns for multiple supply voltage (Vdd) settings to maximize coverage of resistive bridging faults; and a method to reduce the number of Vdd settings without compromising the fault coverage in order to reduce the cost of test. Preliminarily validations of the proposed DFT technique using a number of benchmark circuits demonstrate its effectiveness.