Recent developments in NAND flash scaling

K. Parat
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引用次数: 3

Abstract

NAND Flash cell has scaled by ≫l000X in area since its inception over 2 decades ago. There are, however, several scaling challenges that need to be overcome to continue scaling below the 3X node. Many evolutionary and revolutionary approaches, such as high-K inter-poly-dielectric (IPD), engineered tunnel barriers, trap based charge storage devices, as well as 3-D structures are being pursued to overcome these scaling challenges. The paper will discuss some of these challenges and related developments.
NAND闪存缩放的最新发展
NAND闪存单元自20多年前问世以来,其面积已经扩大了1000倍。然而,要继续扩展到3X节点以下,需要克服几个扩展挑战。许多进化和革命性的方法,如高k间多介电介质(IPD)、工程隧道势垒、基于陷阱的电荷存储装置以及3-D结构,正在寻求克服这些缩放挑战。本文将讨论其中的一些挑战和相关的发展。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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