Test structure metrology of homogeneous contamination

Abstract

Test structures are fabricated with known amounts of iron and copper contamination in the pregate oxide clean of a 1.25- mu m CMOS process. Diode and capacitor measurements indicate device degradation in the case of copper, confirming deposition studies indicating that copper deposits from HF solutions. Iron contaminated wafers show no contamination-related device effects, in support of theoretical predictions and of deposition studies indicating that iron does not deposit from HF solutions. The importance and potential usefulness of test structures as homogeneous contamination monitors is illustrated though device modeling of the contamination effects.<>