Guard band reduction via dynamic voltage sensing and reference setting schemes in power gated applications

Abstract

Use of power gates for leakage power reduction comes at the expense of higher DC and AC load lines due to location of voltage regulator sense point before the power gate and choice reference voltage to guarantee minimum voltage across all power gate and load conditions. This paper proposes schemes to dynamically change both the sense voltage and the reference voltage to reduce AC & DC load lines and consequently voltage guard bands. The simultaneous choice in sense and reference centers the load voltage variation between different gated domains providing an optimal solution without increase in maximum voltages. Application to client microprocessors show a benefit of a few tens of milli-Volts.