Analysis of signal integrity(SI) robustness in through-silicon interposer (TSI) interconnects

Abstract

This paper describes the electrical characteristics of the fine pitch interconnects in silicon carrier systems. The characteristics of such interconnects are explored and a typical FPGA-memory system is compared viz-a-viz with a traditional PCB system from low data rates to higher data rates. Our case-study shows that even though highly resistive wires are used in silicon carrier the interconnects are SI robust due to the shorter die to die interconnect length and the absence of package parasitics.