Hybrid pin control using boundary-scan and its applications

W. Ke
{"title":"Hybrid pin control using boundary-scan and its applications","authors":"W. Ke","doi":"10.1109/ATS.1996.555135","DOIUrl":null,"url":null,"abstract":"Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing.","PeriodicalId":215252,"journal":{"name":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1996.555135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

Abstract

Boundary-Scan (B-S) has been widely used for interconnect testing. It allows all pins of a B-S chip to be controlled uniformly by either system or B-S logic. The requirement that all pins are controlled by the same logic limits B-S usage for many applications. We propose a new B-S instruction, called PINCONTROL, to allow mixed control of chip pins. That is, each pin can be individually configured to be controlled by the system or B-S logic. In this paper we shall demonstrate the application of this instruction for fault injection and inter-chip path delay testing.
边界扫描混合管脚控制及其应用
边界扫描(B-S)已广泛应用于互连测试。它允许B-S芯片的所有引脚由系统或B-S逻辑统一控制。所有引脚由相同逻辑控制的要求限制了B-S在许多应用中的使用。我们提出了一个新的B-S指令,称为PINCONTROL,允许混合控制芯片引脚。也就是说,每个引脚可以单独配置为由系统或B-S逻辑控制。在本文中,我们将演示该指令在故障注入和芯片间路径延迟测试中的应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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