Simple and low cost technique for stacking known good dies to create compact 3D stacked parallel optics assemblies

Abstract

We demonstrate a method for stacking and connecting KGD on each other. The method requires no pre-processing of the ICs and die placement can be done using standard pick and place machines. This novel process allows creating >200um high lithographically defined interconnects and is a simple, scalable and low cost alternative to other techniques for interconnecting 3D stacked ICs.