Intelligent built-in test and stress management

IEEE Automatic Testing Conference.The Systems Readiness Technology Conference. Automatic Testing in the Next Decade and the 21st Century. Conference Record. Pub Date : 1989-09-25 DOI:10.1109/AUTEST.1989.81131

D.W. Richards, J. Collins

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引用次数: 4

Abstract

The authors describe two areas of technology, time stress measurement devices (TSMDs) and smart built-in test (smart BIT), which offer a combined approach to meeting future BIT needs. With reference to TSMD, one or more microelectronic packages are being developed with the capability of providing programmable and environmental stress measurement and recording. Smart BIT is an enhancement to traditional functional BIT which utilizes artificial intelligence techniques to produce an integrated test methodology for increased BIT effectiveness and confidence levels. The implementation of these techniques in conjunction with comprehensive fault-logging of the BIT output, associated TSMD, data and smart BIT decision criteria provides a singular, integrated, and complete test and maintenance capability in support of the needs of two-level maintenance. The state of this research and development is described along with the effect of its implementation on the respective operational and maintenance communities.<>

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智能内置测试和压力管理

作者描述了两个技术领域，时间应力测量设备(tsmd)和智能内置测试(智能BIT)，它们提供了一种组合方法来满足未来的BIT需求。关于TSMD，正在开发一个或多个微电子封装，具有提供可编程和环境应力测量和记录的能力。智能比特是对传统功能比特的增强，它利用人工智能技术来产生一个集成的测试方法，以提高比特的有效性和置信度。这些技术的实现与BIT输出的全面故障记录、相关的TSMD、数据和智能BIT决策标准相结合，提供了单一、集成和完整的测试和维护能力，以支持两级维护的需求。本文描述了这项研究和开发的状态，以及它的实施对各自的操作和维护社区的影响。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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IEEE Automatic Testing Conference.The Systems Readiness Technology Conference. Automatic Testing in the Next Decade and the 21st Century. Conference Record.

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