Impact of On-Die Discrete Heating on Thermal Performance Characteristics of Silicon Based IC Electronic Packages

Abstract

Simulations for thermal characterization of electronic packages for silicon-based integrated circuit (IC) components typically assume one of the two uniform heat generation conditions. They are: (1) an isoflux condition in which heat generation is uniformly distributed over the active surface of the die, or (2) a uniform heat generation over the entire (or active) volume of the die. The use of these models may be justified due to high thermal conductivity of silicon, size of the devices on the die, and their relatively uniform spatial distribution over the entire surface of the die in the traditional silicon technologies. However, the current and future technologies are migrating towards embedded systems solutions, such as system-on-chip, and in traditional applications devices are brought in close proximity to each other for improved on-chip electrical performance. These trends result in localized regions of power dissipation on the die that would invalidate the use of traditional uniform generation models in the thermal characterization. The present study examines the effect of discrete heat sources (as opposed to uniformly distributed sources) on the die on thermal performance and characterization of the electronic packages. For this purpose, a conjugate heat transfer problem of a memory chip in a 119 I/O flip chip ceramic and plastic ball grid array (FC-C & PBGA) package under natural and forced convection conditions. First the model is validated against experimentally measured thermal data on a 119 I/O FC-C & P BGA daisy-chain test packages with a thermal test die with uniformly distributed resistive heat source. Junction-to-ambient temperature difference predictions from the simulations are within 10% of the measurements for the uniform heating case. The validated model is then suitably modified to account for discrete heat sources and actual substrates. Results from the discrete heat sources study show a 15–20% increase in predicted junction-to-ambient temperature difference and a larger (a 10–15 °C) temperature variation across the active face of the die than for with a uniform heat source. These results call for the use of discrete heat sources in the thermal characterization of new generation of embedded silicon technologies. They also point to the need for development of test die and characterization methodologies for these technologies with discrete heat sources.