T. Himeno, N. Matsukawa, H. Hazama, K. Sakui, M. Oshikiri, K. Masuda, K. Kanda, Y. Itoh, J. Miyamoto
{"title":"A new technique for measuring threshold voltage distribution in flash EEPROM devices","authors":"T. Himeno, N. Matsukawa, H. Hazama, K. Sakui, M. Oshikiri, K. Masuda, K. Kanda, Y. Itoh, J. Miyamoto","doi":"10.1109/ICMTS.1995.513988","DOIUrl":null,"url":null,"abstract":"A new, simple test circuit for evaluating the reliability of flash EEPROM devices is described. It measures threshold voltage (V/sub th/) distributions of a large number of cell transistors with easy static operation similar to I-V curve measurement. Moreover, each cell transistor in a large array is selectable to measure static characteristics. This circuit makes it possible to measure the V/sub th/ distribution even in the negative region after erase operation for a NAND-type EEPROM.","PeriodicalId":432935,"journal":{"name":"Proceedings International Conference on Microelectronic Test Structures","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-03-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Conference on Microelectronic Test Structures","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMTS.1995.513988","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
A new, simple test circuit for evaluating the reliability of flash EEPROM devices is described. It measures threshold voltage (V/sub th/) distributions of a large number of cell transistors with easy static operation similar to I-V curve measurement. Moreover, each cell transistor in a large array is selectable to measure static characteristics. This circuit makes it possible to measure the V/sub th/ distribution even in the negative region after erase operation for a NAND-type EEPROM.