Variable supply voltage testing for analogue CMOS and bipolar circuits

Abstract

In this paper a test technique based on the application of power supply levels outside the specified operational range is evaluated with respect to the detection of realistic defects. This work is motivated by two problems encountered in the production test environment. First of all, the test development for analogue circuits is mainly specification driven and as such cannot guarantee a certain fault coverage or quality. Secondly, testing the performance of a state-of-the-art analogue circuit may require application of high performance stimuli (e.g. with respect to frequency or Signal-to-Noise Ratio), while the integrity of such signals is difficult to guarantee because of the non-ideal interface. Two analogue circuits, a CMOS and a bipolar device, are used to evaluate this test technique by means of simulations and to verify it as much as possible by means of measurements.