Expansion of SRAM operation margin by adaptive voltage supply

Abstract

This paper describes the expansion of the operation margin of the SRAM by optimizing the supply voltage condition. To find the optimum voltage, the whole SRAM circuit is designed, which includes the worst case memory cells for the read and the write operations considering the local Vth fluctuation. By the SPICE simulation using 45-nm parameters, successful operation is obtained for wide Vth range by controlling voltages of the word line, the power line and the GND line of memory cells. As a result, the stable operation was confirmed for the wide Vth range of 0.25V-0.65V. By using these results, we can rescue a lot of LSIs which fail under the normal voltage condition.