Stacking of ultra-thin film packages

C. Ko, Y. Shih, Jing-Yao Chang, T. Kuo, Yu-Hua Chen, A. Ostmann, D. Manessis
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引用次数: 3

Abstract

This paper brings into light a new ultra-thin and highly flexible package with embedded active chips. In this technology, no supporting and permanent substrates were needed. Copper foil was used as temporal substrate, and it became the bottom circuit after patterning and etching processes. Ultra-thin chips with 20~25 mum thickness were assembled directly on the structured copper foils in a flip-chip fashion. The gap between chip and copper foil was only about 10 mum. Subsequently, the chips were embedded into flexible adhesive/polyimide polymer layers or alternatively in highly elastic polyurethane materials, with a copper foil always laminated on the top. The resultant ultra-thin film package (UTFP) has a thickness of 100 mum only. Each package sticking on a rod with 10 mm diameter could pass the electrical measuring. Stacking of three-layer chip embedded packages had also been realized and passed electrical measurements. The process details on each core technique will be disclosed, and some results will be presented in the paper.
超薄薄膜包装的堆叠
本文提出了一种嵌入有源芯片的超薄高柔性封装。在这项技术中,不需要支撑和永久的基材。使用铜箔作为时间衬底,经过图案化和蚀刻工艺后成为底部电路。将厚度为20~25 μ m的超薄芯片以倒装方式直接组装在结构铜箔上。芯片和铜箔之间的差距只有10微米左右。随后,芯片被嵌入柔性粘合剂/聚酰亚胺聚合物层或高弹性聚氨酯材料中,铜箔总是层压在顶部。所得到的超薄薄膜封装(UTFP)的厚度只有100微米。每个包贴在直径10mm的棒子上即可通过电测。实现了三层芯片嵌入式封装的堆叠,并通过了电气测量。本文将披露每个核心技术的工艺细节,并介绍一些结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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