Role of surface passivation in the integrated processing of MOS structures

Abstract

Simple MOS capacitors are prepared in a multichamber integrated ultrahigh-vacuum (UHV) processing system with in-situ analysis capabilities. This system has made it possible to integrate the surface preclean steps with the thermal oxidation process without air exposure between the two. In-situ surface analysis has permitted characterization of the precleaned surface, particularly the concentration of oxide and carbon present after different precleaning treatments. The results demonstrate that integration of preclean and oxidation can yield MOS structures with device-quality dielectric breakdown characteristics. Furthermore, they indicate that the role of low-level reactive impurities becomes crucial when using integrated vacuum processing systems. Intentional introduction of a thin passivating oxide layer is essential prior/during wafer heating to oxidation temperature; this prevents degradation of electrical quality which appears associated with etching and roughening of the Si surface by trace O2 impurities