E. I. Cole, J. Soden, P. Tangyunyong, Patrick L. Candelaria, R. W. Beegle, D. Barton, C. Henderson, C. Hawkins
{"title":"Transient power supply voltage (V/sub DDT/) analysis for detecting IC defects","authors":"E. I. Cole, J. Soden, P. Tangyunyong, Patrick L. Candelaria, R. W. Beegle, D. Barton, C. Henderson, C. Hawkins","doi":"10.1109/TEST.1997.639590","DOIUrl":null,"url":null,"abstract":"Transient power supply voltage (V/sub DDT/) analysis is a new testing technique demonstrated as a powerful alternative and complement to I/sub DDQ/ testing. V/sub DDT/ analysis takes advantage of the limited response time of a voltage supply to the changing power demand of an IC during operation. Changes in the V/sub DD/ response time can be used to detect increases in the power demand of a microcontroller with resolutions of 20 nA at 100 kHz, 1 /spl mu/A at 1 MHz, and 2.5 /spl mu/A at 1.5 MHz. These current sensitivities have been shown for ICs with very low I/sub DDQ/ (<100 nA) and for an IC with an intrinsic I/sub DDQ/>300 /spl mu/A. The present system uses 100 cycle averaging to compensate for low frequency \"jitter\". The V/sub DDT/ signal acquisition protocols, frequency versus sensitivity tradeoffs, hardware considerations, noise limitations, data examples, and areas for future research are described.","PeriodicalId":186340,"journal":{"name":"Proceedings International Test Conference 1997","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Test Conference 1997","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1997.639590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 21
Abstract
Transient power supply voltage (V/sub DDT/) analysis is a new testing technique demonstrated as a powerful alternative and complement to I/sub DDQ/ testing. V/sub DDT/ analysis takes advantage of the limited response time of a voltage supply to the changing power demand of an IC during operation. Changes in the V/sub DD/ response time can be used to detect increases in the power demand of a microcontroller with resolutions of 20 nA at 100 kHz, 1 /spl mu/A at 1 MHz, and 2.5 /spl mu/A at 1.5 MHz. These current sensitivities have been shown for ICs with very low I/sub DDQ/ (<100 nA) and for an IC with an intrinsic I/sub DDQ/>300 /spl mu/A. The present system uses 100 cycle averaging to compensate for low frequency "jitter". The V/sub DDT/ signal acquisition protocols, frequency versus sensitivity tradeoffs, hardware considerations, noise limitations, data examples, and areas for future research are described.