T. Nakayama, T. Asamura, M. Kako, M. Murota, M. Matsumoto, Y. Washizu, K. Tomose, K. Kasai, Y. Okayama, K. Hashimoto, K. Ohuchi, K. Hattori, J. Shiozawa, H. Harakawa, F. Matsuoka, M. Kinugawa
{"title":"Excellent process control technology for highly manufacturable and high performance 0.18 /spl mu/m CMOS LSIs","authors":"T. Nakayama, T. Asamura, M. Kako, M. Murota, M. Matsumoto, Y. Washizu, K. Tomose, K. Kasai, Y. Okayama, K. Hashimoto, K. Ohuchi, K. Hattori, J. Shiozawa, H. Harakawa, F. Matsuoka, M. Kinugawa","doi":"10.1109/VLSIT.1998.689234","DOIUrl":null,"url":null,"abstract":"Summary form only given. Highly manufacturable and high performance 0.18 /spl mu/m CMOS technology for logic LSIs with excellent process controllability has been proposed. N/sub 2/O based oxynitride process and OPC (Optical Proximity Correction) technology was developed and realized superior uniformity in CMOSFET characteristics. A new Ti salicide technology which was fine line effect free down to 0.15 /spl mu/m was also established. These technologies were demonstrated and verified by application to 0.18 /spl mu/m high performance logic LSI with high performance interconnects technology.","PeriodicalId":402365,"journal":{"name":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Symposium on VLSI Technology Digest of Technical Papers (Cat. No.98CH36216)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1998.689234","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Summary form only given. Highly manufacturable and high performance 0.18 /spl mu/m CMOS technology for logic LSIs with excellent process controllability has been proposed. N/sub 2/O based oxynitride process and OPC (Optical Proximity Correction) technology was developed and realized superior uniformity in CMOSFET characteristics. A new Ti salicide technology which was fine line effect free down to 0.15 /spl mu/m was also established. These technologies were demonstrated and verified by application to 0.18 /spl mu/m high performance logic LSI with high performance interconnects technology.