Wafer backside inspection applications in lithography

Abstract

As the Semiconductor Industry starts to ramp its 110 nm production capacity, the need for optimal uniformity across the wafer surface becomes a very important topic in lithography. Due to the tightening of depth of focus requirements, the process window required to be able to print the required structure leaves little or no room for any localized deviation in the wafer uniformity. For 300 mm semiconductor device manufacturing, this resulted in the use of double-side polished, so-called "super flat", wafers. This paper discusses methods to identify yield relevant defects on the wafer backside without having to sacrifice wafers. It is based on recent studies carried out at both Infineon Semiconductor 200 and 300 mm Fabs in Dresden to characterize the need and the effectiveness of wafer backside defect inspection using the BSIM (Back Side Inspection Module) on the Surfscan/sup /spl reg// SP1/sup TB1/. Firstly, we focus on some general topics of setting up a backside inspection for photolithography. We show how to determine the required sensitivity in order to capture the defects of interest and to provide quantitative information on the number of wafers affected. We then discuss two studies in detail: The 1st study was an investigation into the quality of the backside of 300 mm wafers pre and post lithography throughout the manufacturing process. The 2nd study describes how focus spots on the front side of 200 mm wafer were correlated to damage on the backside and how the root cause was identified. Finally, we draw an outline to requirements that we believe will be an essential part of automatic backside inspection in the forthcoming future.