Verilog-A SPICE Model of PECVD SiO2 OTP Memory Device

Abstract

Many emerging electronic devices are being used for computation, storage as well as several other purposes to decrease the scaling requirement of MOSFET. The accurate behavior prediction of such hybrid systems (MOSFET + Emerging) is a challenging task before their co-integration in hardware. This paper presents a Verilog-A compact model for our PECVD SiO2 MIM type one time programmable (OTP) memory device. We show strong agreement between the simulated results and experimental electrical-characterization. The characterization of the devices presents the one time switching from its pristine high resistance state (HRS ∼ GΩ) to extreme low resistance state (LRS ∼ 10Ω). DC and transient simulations of one transistor one OTP (1T1O) illustrates the capability of the proposed model for hybrid circuit simulations for different applications.