TAC: Testing time reduction for digitally-calibrated designs

Abstract

For digitally-calibrated analog, mixed-signal and radio-frequency (AMS/RF) circuits, it is desirable to stop the calibration process as soon as it reaches convergence. Such a strategy can avoid wasting unnecessary calibration time and ensure high calibration quality during production testing. However, due to the lack of systematic methods for convergence detection, existing digitally-calibrated designs simply allot a fixed and sufficiently long period of time for calibration. In this paper, we propose a method to reduce testing time by terminating calibration at convergence for circuits that employ the least-mean-square (LMS) algorithm for built-in calibration. We observe the fluctuation range of the tap coefficients in the digital calibration unit to determine whether the convergence criteria are met and subsequently terminate the calibration process. We conduct two case studies - a digitally-calibrated pipelined ADC and a digitally-calibrated image-reject receiver - to demonstrate the generality and effectiveness of our proposed method. In comparison with the existing termination policy, our proposed method, on average, can reduce the calibration time by 70%.