Steep-slope tunnel field-effect transistors using III–V nanowire/Si heterojunction

Abstract

In this paper, we propose tunneling field-effect transistors (TFETs) using III-V nanowire (NW)/Si heterojunctions and experimentally demonstrate steep-slope switching behaviors using InAs NW/Si heterojunction TFET with surrounding-gate architecture and high-k dielectrics. Control of resistances in this device structure is important for achieving steep-slope switching. A minimum subthreshold slope (SS) of the TFET is 21 mV/dec at VDS of 0.10 - 1.00 V.