Investigate for Very-Low-Voltage Test Implemented In Probe

Abstract

Integrated circuit (IC) manufacturers perform production tests to detect defective part to guarantee the quality level of the product. Weak ICs contain flaws, defects that do not cause functional failures at some or all normal operating conditions but degrade the ICs performance, reduce noise margins, or draw excessive supply current. The current normal Low voltage test is not able to defect weak ICs or eliminate the early-life failures. The auto and military customers have very high quality requirement. Very-Low-voltage test can detect the defects (flaws) that cause early-life failures or intermittent failures. And the cost of Very-Low-Voltage test is very low. Very-Low-Voltage testing is a method where a test is performed at a supply voltage that is much lower than its nominal operating voltage. It can detect resistive shorts and delay flaws that are caused by degraded signals or diminished-drive gates. It can be implemented in die level, and no special equipment requirement of replacing the defect, which do not bring the additional cost. In this paper, the study aimed mainly at Very-Low-Voltage implemented in DC Scan test at probe level, and the core voltage value of DC scan test for different domains setup is discussed. JMP software is data analysis tool used in the study, including data comparison among DOM1, DOM2, DOM3 and ARM core. Optimized the core voltage, determining the best parameters to be used, and implemented it in probe program. Collected the real probe Very-Low-Voltage rejects and do Electric and Physical Failure Analysis(FA). For the failure unit, diagnostic, shmoo analysis between Level (VDD_SOC_CAP) and Period, Laser Assisted Device Alteration(LADA), and Soft Defect Localization(SDL) were performed on failure unit, and the anomaly was found. After the unit was thinned, Electron-Optical Probing(EOP) and cross section were performed on the anomaly location. The high resistive conduct among metal is found in FA. With the optimized data, the good probe test performance was get, and improved ICs quality. The Very-Low-Voltage test can screen out the normal low voltage rejects. The traditional normal low voltage DC Scan tests were replaced by Very-Low-Voltage DC Scan tests, which also reduce the probe test time. It is concluded that the Very-Low-Voltage test is good test method in probe to guarantee the die quality, improve the defect coverage, screen out the weak ICs, and reduce the test cost.