Process integration technology for low process complexity BiCMOS using trench collector sink

Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting Pub Date : 1994-10-10 DOI:10.1109/BIPOL.1994.587901

H. Yoshida, H. Suzuki, Y. Kinoshita, K. Imai, T. Akimoto, K. Tokashiki, T. Yamazaki

引用次数: 8

Abstract

A BiCMOS process integration technology featuring a W-plug trench collector sink simultaneously formed with an emitter defining step is presented. This technology can provide a low resistance collector sink without any additional process steps to form the collector sink and realizes a low cost 0.35 /spl mu/m BiCMOS device with only 11 photo-masks.

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采用沟槽集电极的低工艺复杂度BiCMOS工艺集成技术

提出了一种具有w塞沟槽集电极汇与发射极定义阶跃同时形成的BiCMOS工艺集成技术。该技术可以提供低电阻集电极汇，而不需要任何额外的工艺步骤来形成集电极汇，并实现了低成本的0.35 /spl mu/m BiCMOS器件，只有11个光电掩模。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting

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