New Monte Carlo simulation for polycrystalline silicon thin-film transistor

Abstract

The conduction mechanism in poly-Si TFT is investigated in detail using a new device simulator based on the Monte Carlo method. In this simulator, the influences of grain boundaries on the electrical conduction are represented by the grain boundary traps. The potential barriers are formed at the grain boundaries by the trapped electrons. The conduction electrons are repelled by these potential barriers and the current flow decreases. It is found from the simulation results that these potential barriers are reduced more significantly near the poly-Si-gate oxide interface and consequently the current flow is confined near the interface when a high gate voltage is applied. It also turns out that holes generated by the impact ionization significantly influence the channel electron conduction through reducing the barrier height at the grain boundary. This effect is the origin of the avalanche induced short channel effect in poly-Si TFT.