N. Bagga, Nitanshu Chauhan, A. Bulusu, S. Dasgupta
{"title":"Demonstration of a Novel Ferroelectric-Dielectric Negative Capacitance Tunnel FET","authors":"N. Bagga, Nitanshu Chauhan, A. Bulusu, S. Dasgupta","doi":"10.1109/MOS-AK.2019.8902381","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a novel double gate Ferroelectric-Dielectric Negative Capacitance Tunnel FET (FDNC-TFET). A layer of ferroelectric material is kept near the source-channel junction to incorporate the impact of negative capacitance which arises due to the polarization of ferroelectric material. This amplifies the electric field and in turn enhances the tunneling probability. A well calibrated Sentaraus TCAD setup is used to simulate the proposed structure and the validity is proved by fitting the polarization-field curve with experimental data. We have compared the results of FDNC-TFET with Reference Tunnel FET (R-TFET) and found ~16× of improvement in the ON current. To justify the choice of ferroelectric-dielectric combination in the proposed structure, we have also compared the results of FDNC-TFET with the Full Ferroelectric Negative Capacitance Tunnel FET (FFNC-TFET), having a complete ferroelectric layer over the channel. The reported reduction in ambipolar current of our proposed work is ~25 times as compared to FFNC-TFET.","PeriodicalId":178751,"journal":{"name":"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)","volume":"90 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Conference on Modeling of Systems Circuits and Devices (MOS-AK India)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MOS-AK.2019.8902381","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In this paper, we propose a novel double gate Ferroelectric-Dielectric Negative Capacitance Tunnel FET (FDNC-TFET). A layer of ferroelectric material is kept near the source-channel junction to incorporate the impact of negative capacitance which arises due to the polarization of ferroelectric material. This amplifies the electric field and in turn enhances the tunneling probability. A well calibrated Sentaraus TCAD setup is used to simulate the proposed structure and the validity is proved by fitting the polarization-field curve with experimental data. We have compared the results of FDNC-TFET with Reference Tunnel FET (R-TFET) and found ~16× of improvement in the ON current. To justify the choice of ferroelectric-dielectric combination in the proposed structure, we have also compared the results of FDNC-TFET with the Full Ferroelectric Negative Capacitance Tunnel FET (FFNC-TFET), having a complete ferroelectric layer over the channel. The reported reduction in ambipolar current of our proposed work is ~25 times as compared to FFNC-TFET.