{"title":"A single-poly BiCMOS technology with 30 GHz bipolar f/sub T/","authors":"C. Wang, J. Van Der Velden","doi":"10.1109/BIPOL.1994.587902","DOIUrl":null,"url":null,"abstract":"We present process design and device performance of bipolar transistors embedded in a single-poly BiCMOS technology. The bipolar device possesses a CMOS-like morphology and is easily integrated into a CMOS-based process flow with two additional masks. The integrated process yields a structure with minimum topography. Process concerns associated with the conventional double-poly structure are therefore avoided. Shallow emitter and base junction depth are achieved through a conventional ion implantation approach with proper control of the thermal budget. Bipolar transistors featuring 31 GHz bipolar f/sub T/ and 4 V BV/sub ceo/ are achieved. The technology thus developed has the highest f/sub T/ in the category of single-polysilicon BiCMOS process ever reported.","PeriodicalId":373721,"journal":{"name":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-10-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIPOL.1994.587902","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
We present process design and device performance of bipolar transistors embedded in a single-poly BiCMOS technology. The bipolar device possesses a CMOS-like morphology and is easily integrated into a CMOS-based process flow with two additional masks. The integrated process yields a structure with minimum topography. Process concerns associated with the conventional double-poly structure are therefore avoided. Shallow emitter and base junction depth are achieved through a conventional ion implantation approach with proper control of the thermal budget. Bipolar transistors featuring 31 GHz bipolar f/sub T/ and 4 V BV/sub ceo/ are achieved. The technology thus developed has the highest f/sub T/ in the category of single-polysilicon BiCMOS process ever reported.