Keynote Speech 1: New Paths for Test

Abstract

Summary form only given.Test techniques for screening defective integrated circuits (ICs) after manufacture have to consider potential defects as well as the cost. In the future, test must deal with trends including advances in IC technology which continue to reduce feature sizes, the fact that mixed-signal systems on a chip are becoming a larger fraction of the semiconductor market, and very high transistor densities as well as new transistor technologies which loom over the horizon. This talk will explore the significant impact that these trends will have on the future of test. Test approaches for digital circuits have to deal with failures which are no longer just logic level, and test techniques have to address embedded mixed-signal and RF modules. In addition, with the very large number of potential devices on a chip, test will have to begin to address tolerating defects or on-chip repair for reasonable yields. Some possible directions which show promising solutions to these problems will also be described.