An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology

Abstract

This paper presents a new SRAM memory cell in Double Gate MOS technology. It’s a reconfigurable 6T-4T that takes benefit of the advantages of both 6T and 4T SRAM cells. The cell improves both read stability and write-ability, without adding any transistor or external signal, compared to conventional 6T SRAM cell. The write ability is improved by a factor of 64% and the stability in read mode by a factor of 70% while slightly increasing the stability in retention mode. Thanks to its excellent stability and good insensitivity to process variations (δ/μµ 4 and 2 times lower), the proposed architecture is also a promising candidate for low voltage applications.