High-speed parallel interface implementation with low-cost system solution by using signal integrity factorial design

Abstract

A systematic design method by using channel factorial design is proposed to meet the low-cost DDRII system solution with quad-flat-package (QFP) and two-layer printed circuit board. The channel characteristic was analyzed through one numerical transformation between time and frequency domains to figure out the time-variant waveform on the corresponding spectrum for potential radiated emission issues. By using the factorial analysis, the critical electrical parameters could be clearly list down and optimized in the pre-design analysis. This methodology could be usefully applied in the electrical physical constraint setup and budget control on the design phase. We can make a right compromise among the different design electrical factors with the corresponding penalties to robustly function up to DDRII 800Mbps in this low-cost system.