{"title":"Microball and thicker Cu Pad: A substrate solution for better package reliability and robustness on bumped devices","authors":"Jayson Rae Tulas, Tony Taloban","doi":"10.1109/EPTC.2015.7412341","DOIUrl":null,"url":null,"abstract":"The substrate design chosen for the newer Silicon (Si) node utilizes a low core thickness compared to previous Si nodes which used a high core thickness substrate. One motivation to move to low core thickness is the better electrical performance it could provide to the package, especially since most of the newer silicon technology devices are used for high powered applications. A low core substrate offers shorter routing for the current which minimizes the losses incurred during the travel of current from ball to die and vice versa. While it is better in terms of electrical performance, a low core thickness substrate presents new challenges in terms of manufacturability and reliability. Bump cracks and pad cracks were observed on the initial reliability tests. As such, the team collaborated with substrates suppliers to provide a solution that will make the newer silicon technology packages robust enough to withstand the adverse effects of package warpage, stress and solder voids. Microball (uBall), which is a new bumping technology and thicker Copper (Cu) pad are among the improvements in this paper. This paper also documents the root cause analysis, evaluations and verifications done to validate the effectiveness of identified corrective actions.","PeriodicalId":418705,"journal":{"name":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2015.7412341","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The substrate design chosen for the newer Silicon (Si) node utilizes a low core thickness compared to previous Si nodes which used a high core thickness substrate. One motivation to move to low core thickness is the better electrical performance it could provide to the package, especially since most of the newer silicon technology devices are used for high powered applications. A low core substrate offers shorter routing for the current which minimizes the losses incurred during the travel of current from ball to die and vice versa. While it is better in terms of electrical performance, a low core thickness substrate presents new challenges in terms of manufacturability and reliability. Bump cracks and pad cracks were observed on the initial reliability tests. As such, the team collaborated with substrates suppliers to provide a solution that will make the newer silicon technology packages robust enough to withstand the adverse effects of package warpage, stress and solder voids. Microball (uBall), which is a new bumping technology and thicker Copper (Cu) pad are among the improvements in this paper. This paper also documents the root cause analysis, evaluations and verifications done to validate the effectiveness of identified corrective actions.