Scaling effect on electromigration in on-chip Cu wiring

Abstract

Electromigration in on-chip plated Cu damascene interconnections has been investigated for metal line widths from 0.24 /spl mu/m to 1.3 /spl mu/m. Void growth at the cathode end and protrusions at the anode end of the lines have been found to be the main causes of failure. The failure lifetime was found to decrease linearly with decrease in the cross-sectional area of the line. This behavior can be explained by interface diffusion as the dominant path for transport and by the bamboo-like nature of the microstructure. The factor of n for the lifetime dependence on current density for 0.28 /spl mu/m wide lines, /spl tau/=/spl tau//sub 0/j/sup -n/, was found to increase from 1 to 2 as j increased beyond 25 mA//spl mu/m/sup 2/.