Wafer-to-Wafer Bonding Techniques: From MEMS Packaging to IC Integration Applications

R. Pelzer, H. Kirchberger, P. Kettner
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引用次数: 17

Abstract

Device stacking and packaging on wafer-level plays a key role for the continuous miniaturization, expansion of functionality and reduction of production costs of MEMS and MCMs. The field of applications for integrated devices and MEMS is huge and the packaging requirements for the different systems are versatile. Driven by the automotive industry, extensive research and development in the field of wafer bonding resulted in a variety of different technologies. The primary targets of packaging steps are not only protecting devices from environmental influences, it is also important to compensate for stress, or to enable final testing in an efficient manner. The type of interaction of the MEMS with the environment determines the design, packaging materials and the packaging technique. Inappropriate choice of the package may result in poor reliability and narrow the spectrum of the system's applications. Therefore it's not surprising that packaging represents the major part of the cost of the whole MEMS device (30-50% of the costs may represent packaging; for some devices up to 80% have been reported). As several of these techniques are suitable for 3D stacking of IC chips as well, we will explain and discuss these requirements for this application, too
晶圆间键合技术:从MEMS封装到IC集成应用
晶圆级器件堆叠和封装对于MEMS和mcm的持续小型化、功能扩展和降低生产成本起着关键作用。集成器件和MEMS的应用领域是巨大的,不同系统的封装要求是多种多样的。在汽车工业的推动下,晶圆键合领域的广泛研究和发展产生了各种不同的技术。包装步骤的主要目标不仅是保护设备免受环境影响,还重要的是补偿压力,或以有效的方式进行最终测试。微机电系统与环境相互作用的类型决定了其设计、封装材料和封装技术。如果选择不当,可能会导致系统可靠性差、应用范围窄。因此,封装代表整个MEMS器件成本的主要部分(30-50%的成本可能代表封装;对于某些设备高达80%的报告)。由于其中一些技术也适用于IC芯片的3D堆叠,我们也将解释和讨论该应用的这些要求
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