{"title":"Wafer-to-Wafer Bonding Techniques: From MEMS Packaging to IC Integration Applications","authors":"R. Pelzer, H. Kirchberger, P. Kettner","doi":"10.1109/ICEPT.2005.1564704","DOIUrl":null,"url":null,"abstract":"Device stacking and packaging on wafer-level plays a key role for the continuous miniaturization, expansion of functionality and reduction of production costs of MEMS and MCMs. The field of applications for integrated devices and MEMS is huge and the packaging requirements for the different systems are versatile. Driven by the automotive industry, extensive research and development in the field of wafer bonding resulted in a variety of different technologies. The primary targets of packaging steps are not only protecting devices from environmental influences, it is also important to compensate for stress, or to enable final testing in an efficient manner. The type of interaction of the MEMS with the environment determines the design, packaging materials and the packaging technique. Inappropriate choice of the package may result in poor reliability and narrow the spectrum of the system's applications. Therefore it's not surprising that packaging represents the major part of the cost of the whole MEMS device (30-50% of the costs may represent packaging; for some devices up to 80% have been reported). As several of these techniques are suitable for 3D stacking of IC chips as well, we will explain and discuss these requirements for this application, too","PeriodicalId":234537,"journal":{"name":"2005 6th International Conference on Electronic Packaging Technology","volume":"7 9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-08-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on Electronic Packaging Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEPT.2005.1564704","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
Device stacking and packaging on wafer-level plays a key role for the continuous miniaturization, expansion of functionality and reduction of production costs of MEMS and MCMs. The field of applications for integrated devices and MEMS is huge and the packaging requirements for the different systems are versatile. Driven by the automotive industry, extensive research and development in the field of wafer bonding resulted in a variety of different technologies. The primary targets of packaging steps are not only protecting devices from environmental influences, it is also important to compensate for stress, or to enable final testing in an efficient manner. The type of interaction of the MEMS with the environment determines the design, packaging materials and the packaging technique. Inappropriate choice of the package may result in poor reliability and narrow the spectrum of the system's applications. Therefore it's not surprising that packaging represents the major part of the cost of the whole MEMS device (30-50% of the costs may represent packaging; for some devices up to 80% have been reported). As several of these techniques are suitable for 3D stacking of IC chips as well, we will explain and discuss these requirements for this application, too