Technical and economic requirements of integrated SOC testing

Abstract

The consumer and business demand of integrating more functionality into a single device is causing the level of integration of today's system-on-a-chip (SOC) ICs to accelerate faster than ever before. IC design and manufacturing technologies have also converged to make this possible as never before. Some examples of this are Set-Top-Box/Cable Modems (STB/CMs), cell phones with PDA and video imaging and DVD R/W systems. These types of integrated SOCs can have digital, memory, mixed signal, and RF challenges, and a true SOC tester must combine all of these capabilities to address these challenges. However, meeting the technical challenges is not enough because these are high volume applications that demand low cost of test to make them economically feasible. This is also why the tester architecture must integrate all these different capabilities-single insertion testing is a must to meet the economic goals of devices in a consumer market. The particular technical and economic requirements of the SOC device need to be understood and then mapped into tester capability and the cost-of-test (COT) associated with high volume production. To understand what it takes to test this class of SOC, a STB/CM and a DVD R/W application will be used as examples. Typical block diagrams will be explored and solutions to some of the biggest technical challenges will be developed. High volume manufacturing will then be evaluated to reduce the COT to its minimum.