K.T. Kim, L.G. Kang, T. Park, Y. Shin, J. Park, C.J. Lee, C. Hwang, D. Chin, Y.E. Park
{"title":"Tungsten silicide/titanium nitride compound gate for submicron CMOSFET","authors":"K.T. Kim, L.G. Kang, T. Park, Y. Shin, J. Park, C.J. Lee, C. Hwang, D. Chin, Y.E. Park","doi":"10.1109/VLSIT.1990.111035","DOIUrl":null,"url":null,"abstract":"Experimental results are presented for a WSi2/TiN compound-gate MOSFET with a near-midgap work function ranging from 4.63 to 4.75 eV and low resistivity. Sheet resistances of the compound gate and the conventional n+ gate with and without the interconnection layer are studied, and it is shown that the compound gate materials are an adequate interconnection layer. When positive bias is applied to the gate, the tunneling current of a compound-gate MOS is similar to that of an n+-poly-gate MOS with and without interconnection layer. This is because electrons are tunneling through the oxide from the silicon substrate to the gate, so that the barrier height is defined dominantly by the oxide barrier from the silicon substrate","PeriodicalId":441541,"journal":{"name":"Digest of Technical Papers.1990 Symposium on VLSI Technology","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers.1990 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1990.111035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 13
Abstract
Experimental results are presented for a WSi2/TiN compound-gate MOSFET with a near-midgap work function ranging from 4.63 to 4.75 eV and low resistivity. Sheet resistances of the compound gate and the conventional n+ gate with and without the interconnection layer are studied, and it is shown that the compound gate materials are an adequate interconnection layer. When positive bias is applied to the gate, the tunneling current of a compound-gate MOS is similar to that of an n+-poly-gate MOS with and without interconnection layer. This is because electrons are tunneling through the oxide from the silicon substrate to the gate, so that the barrier height is defined dominantly by the oxide barrier from the silicon substrate