Through-Silicon-Via resistive-open defect analysis

C. Metzler, A. Todri, A. Bosio, L. Dilillo, P. Girard, A. Virazel
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引用次数: 13

Abstract

Three-dimensional (3D) integration is a fast emerging technology that offers integration of high density, fast performance and heterogeneous circuits in a small footprint. Through-Silicon-Vias (TSVs) enable 3D integration by providing fast performance and short interconnects among tiers. However, they are also susceptible to defects that occur during manufacturing steps and cause crucial reliability issues. In this paper, we perform an analysis of resistive-open defects (ROD) on TSVs considering coupling effects (i.e. inductive and capacitive) and a wide frequency spectrum. Our experiments show that both substrate coupling and switching frequency can have a significant impact on weak open TSV behavior.
通硅通阻开路缺陷分析
三维(3D)集成是一种快速兴起的技术,它提供了高密度,快速性能和异构电路的集成在一个小的足迹。通过硅通孔(tsv)通过提供快速性能和层之间的短互连来实现3D集成。然而,它们也容易受到在制造过程中出现的缺陷的影响,并导致关键的可靠性问题。在本文中,我们分析了考虑耦合效应(即电感和电容)和宽频谱的tsv上的电阻-开放缺陷(ROD)。我们的实验表明,衬底耦合和开关频率都可以对弱开路TSV行为产生显著影响。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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